The architecture and implementation of a high-speed host interface

作者: B.S. Davie

DOI: 10.1109/49.215018

关键词: Computer architectureScheduling (computing)Asynchronous communicationHost interfaceSystems architectureTelecommunications networkNetwork interfaceInterfacingComputer scienceAsynchronous Transfer ModeEmbedded systemHost (network)

摘要: In the design of a high-speed network, host network interface is critical component in achieving high end-to-end throughput. Some architectural issues involved interfacing are discussed. These include appropriate partitioning functionality between and choice mechanism for data movement into, out of, within host. The general considered specific example: realization highly flexible 622-Mb/s asynchronous transfer mode network. architecture such an described, experimental results obtained from its prototype implementation presented. will allow experimentation with variety scheduling segmentation/reassembly algorithms, new transport protocols, while also delivering bandwidths to >

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