Test and Testable Design

作者: Hans-Joachim Wunderlich

DOI: 10.1007/978-3-642-57199-2_4

关键词: Integrated circuitSequential logicReliability engineeringFault coverageProcess (computing)Test (assessment)FabricationComputer scienceLinear feedback shift register

摘要: Defects may occur during the fabrication process and lifetime of integrated circuits. Integrating a faulty device into systems will result in expensive repairs or even unsafe situations should be avoided by testing chips

参考文章(106)
B. Koenemann, Built-in logic block observation techniques Proc. 1979 IEEE Test Conf.. pp. 37- 41 ,(1979)
Tom W. Williams, Corot W. Starke, Matthias Gruetzner, Wilfried Daehn, Comparison of Aliasing Errors for Primitive and Non-Primitive Polynomials. international test conference. pp. 282- 289 ,(1986)
W. Maly, F. J. Ferguson, J. P. Shen, Systematic characterization of physical defects for fault analysis of MOS IC cells international test conference. pp. 390- 399 ,(1984)
Albrecht P. Stroele, BIST Pattern Generators Using Addition and Subtraction Operations Journal of Electronic Testing. ,vol. 11, pp. 69- 80 ,(1997) , 10.1023/A:1008299817888
Stephen Y. H. Su, Yashwant K. Malaiya, A New Fault Model and Testing Technique for CMOS Devices. international test conference. pp. 25- 34 ,(1982)
Jose Pineda de Gyvez, Integrated Circuit Defect-Sensitivity : Theory and computational models / Jose Pineda de Gyvez 1. DESAIN KOMPUTER<BR>2. IC (INTEGRATED CIRCUITS),Integrated Circuit Defect-Sensitivity : Theory and computational models / Jose Pineda de Gyvez. ,vol. 1993, pp. 1- 99 ,(1993)
William H. McAnney, Paul H. Bardell, Self-Testing of Multichip Logic Modules. international test conference. pp. 200- 204 ,(1982)
Solomon W. Golomb, Shift register sequences ,(1981)
Rudolf Lidl, Harald Niederreiter, Introduction to finite fields and their applications The Mathematical Gazette. ,vol. 72, pp. 335- ,(1986) , 10.1017/CBO9781139172769