Logic for increasing the number of pixels in a horizontal scan of a bit mapping type video display

摘要: A circuit (FIG. 2), for use with a basic display system 1), increases by an integral factor M the number (X) of character pixels per line without changing rates clock pulse trains (S x (f ), S 1 )) provided timing (114, 116) resident in system. The both: (a) rate at which N-bit words are retrieved serially from system's memory means and (b) bits those words, whose represent characters within scan line, converted into stream MX bits. In one embodiment, equals 2.