作者: Fayrouz Haddad , Wenceslas Rahajandraibe , Abdelhalim Slimane
DOI: 10.1109/ISCAS.2015.7168622
关键词: Electronic engineering 、 Parasitic extraction 、 Polyphase system 、 Sizing 、 Engineering 、 Radio frequency 、 Power consumption 、 Bandwidth (signal processing) 、 Image response 、 CMOS
摘要: This article presents the design and implementation of a multi-stage radio-frequency (RF) passive polyphase filter (PPF). The layout parasitics mismatch which deteriorate significantly RF performance are analyzed modeled. To reduce this parasitic degradation, novel optimal technique is proposed. It based on reproducing same optimized PPF stage for different stages while desired bandwidth ensured due to an sizing inter-stages connections. approach has been validated with chip measurements. Using proposed techniques more than 55 dB image rejection over [1.5; 3.3] GHz demonstrated achieving zero power consumption small silicon area in 130nm CMOS technology.