Information transferring apparatus
作者： Yoshikuni Sato , Toshiya Takahashi
DOI:
关键词: Control bus 、 Memory-mapped I/O 、 Computer hardware 、 Memory buffer register 、 Central processing unit 、 Direct memory access 、 Computer science 、 Memory data register 、 Output device 、 Address bus
摘要: A data processing system including a central unit (CPU), memory device operating on word length of 2 m-bits, an input/output m bits, m-bit register and direct access (DMA) controller for transferring words in both directions between the independently CPU. bus is connected two buses to switching circuit which controls transfer device. control generates timing signals such that, during first cycle from input/ouput stored register, second transferred directly via and, also, word, For device, bits are following
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