A 400-MHz DA converter with a 4-bit color map for 2000-line display
作者： T. Watanabe , K. Maio , K. Norisue , S. Hayashi , S. Ueda
DOI: 10.1109/4.271
关键词: Line (text file) 、 Computer hardware 、 4-bit 、 Engineering 、 Chip 、 Power consumption 、 Color map 、 Settling time
摘要: A video digital-to-analog (DA) converter with a color map is discussed that monolithic, bipolar, and achieves ultrahigh speed. When the chip addressed 4-bit data, 256-step color-map data can be used in an extremely high-definition 2000-pixel*2000-pixel display. combination of two emitter-coupled logic (ECL) RAMs data-multiplex DA used. The conversion rate 400 MHz, settling time 2 ns, rise fall times are both 0.8 power consumption 1.3 W. >
sci-hub.se 参考文章(5)
Kuang Chi, C. Geisenhainer, M. Riley, R. Rose, P. Sturges, B. Sullivan, R. Watson, R. Woodside, A 100Mb/s CMOS video D/A converter with shift register and color map international solid-state circuits conference. pp. 134- 135 ,(1986) , 10.1109/ISSCC.1986.1156990
K. Washio, T. Watanabe, T. Okabe, N. Horie, 10K Gate I 2 L and 1K component analog compatible bipolar VLSI technology—HIT-2 IEEE Transactions on Electron Devices. ,vol. 32, pp. 237- 241 ,(1985) , 10.1109/T-ED.1985.21935
K. Maio, S.-I. Hayashi, M. Hotta, T. Watanabe, S. Ueda, N. Yokozawa, A 500-MHz 8-bit D/A converter IEEE Journal of Solid-state Circuits. ,vol. 20, pp. 1133- 1137 ,(1985) , 10.1109/JSSC.1985.1052450
K.K. Chi, C.S. Geisenhainer, M. Riley, R.C. Rose, P.J. Sturges, B.M. Sullivan, R.B. Watson, R.H. Woodside, M.W. Wu, A CMOS triple 100-Mbit/s video D/A converter with shift register and color map IEEE Journal of Solid-state Circuits. ,vol. 21, pp. 989- 996 ,(1986) , 10.1109/JSSC.1986.1052640
J.A. Schoeff, An inherently monotonic 12 bit DAC international solid-state circuits conference. ,vol. 14, pp. 904- 911 ,(1979) , 10.1109/JSSC.1979.1051296