作者: S. Veni , R.A. George , K.A. Narayanan Kutty
DOI: 10.1109/INDCON.2005.1590212
关键词: Very-large-scale integration 、 Engineering 、 Edge enhancement 、 Computer vision 、 Image quality 、 Node (circuits) 、 Synthetic aperture radar 、 Dynamic range compression 、 Fixed-pattern noise 、 Preprocessor 、 Artificial intelligence
摘要: The Boundary Contour System (BCS) provides a powerful technique to recognize patterns and restore image quality under excessive fixed pattern noise as in Synthetic Aperture Radar (SAR) images. This paper describes the VLSI design of circuits needed for preprocessing stages BCS (i.e.) noisy data that vary intensity over much four orders magnitude. are based on equations representing stage one BCS. have been designed using cadence spectre IC5 tool. model with ID array 20 node cells is which here demonstrates dynamic range compression responses input stimuli from linear illustrate edge enhancement.