作者: Han Chou , Parthasarathy Sriram
DOI:
关键词: Semiconductor memory 、 Memory segmentation 、 Memory refresh 、 Registered memory 、 Computer science 、 Computer hardware 、 Memory controller 、 Interleaved memory 、 Memory map 、 Real-time computing 、 Memory management
摘要: In some embodiments, a video processing system including processor, an external memory, and integrated circuit that implements both memory controller (having embedded intelligence) internal coupled to the controller. The is configured pre-cache in partial frames of reference data (e.g., N-line slices M-line frames, where M>N), respond requests from processor) for blocks by determining whether each requested block (or at least two portions thereof) has been pre-cached causing cached portion be read non-cached memory. Preferably, pre-caching performed predetermined manner independent which are actually asserted, exploits known correlation between two-dimensional pixel locality (“current block”) undergo decoding) using data, may process current block, probability such will needed block. Other aspects controllers use methods during operation any or