作者: W. vanCleemput
关键词: Physical design 、 Layout Versus Schematic 、 Design layout record 、 Layout 、 Integrated circuit layout 、 Computer science 、 Circuit extraction 、 IC layout editor 、 Graph embedding 、 Theoretical computer science
摘要: In this paper mathematical models for use in a topological approach to solving the circuit layout problem are outlined. After brief survey of some existing models, an improved model is suggested. This based on concept partially oriented graph and contains more information than earlier models. reduces need special constraints embedding algorithm. The also allow pin gate assignment function under certain conditions.