作者: Ni Hu , Arthur Tay , Kuen-Yu Tsai
DOI: 10.1088/0957-0233/17/8/025
关键词: Microelectronics 、 Computer science 、 Reliability (semiconductor) 、 Process (computing) 、 Semiconductor device fabrication 、 Temperature measurement 、 Wafer 、 Fault detection and isolation 、 Electronic engineering 、 Lithography
摘要: Wafer warpage can affect device performance, reliability and linewidth control in various processing steps microelectronics manufacturing. Early detection will minimize cost time. We have previously demonstrated an on-line approach for detecting wafer the profile of warped wafer. The proposed demonstrates that be computed during thermal lithography sequence. However, is computationally intensive information made available at end step. Any attempts real-time correction temperature are thus not possible. In this paper, we situ to detect its midway through process. Based on first principles modelling, able estimate a from measurements. implemented conventional systems. Experimental results demonstrate feasibility repeatability approach. A 75% improvement computational time achieved with