A fast in situ approach to estimating wafer warpage profile during thermal processing in microlithography

作者: Ni Hu , Arthur Tay , Kuen-Yu Tsai

DOI: 10.1088/0957-0233/17/8/025

关键词: MicroelectronicsComputer scienceReliability (semiconductor)Process (computing)Semiconductor device fabricationTemperature measurementWaferFault detection and isolationElectronic engineeringLithography

摘要: Wafer warpage can affect device performance, reliability and linewidth control in various processing steps microelectronics manufacturing. Early detection will minimize cost time. We have previously demonstrated an on-line approach for detecting wafer the profile of warped wafer. The proposed demonstrates that be computed during thermal lithography sequence. However, is computationally intensive information made available at end step. Any attempts real-time correction temperature are thus not possible. In this paper, we situ to detect its midway through process. Based on first principles modelling, able estimate a from measurements. implemented conventional systems. Experimental results demonstrate feasibility repeatability approach. A 75% improvement computational time achieved with

参考文章(15)
Harry J. Levinson, Lithography Process Control ,(1999)
Jacques A. Fauque, Ronald D. Linder, Extended range and ultra-precision non-contact dimensional gauge ,(1997)
Arthur Tay, Weng Khuen Ho, Ni Hu, Xiaoqi Chen, Estimation of wafer warpage profile during thermal processing in microlithography Review of Scientific Instruments. ,vol. 76, pp. 075111- ,(2005) , 10.1063/1.1979468
Akihiro Hisai, Koji Kaneyama, Charles N. Pieczulewski, Optimizing CD uniformity by total PEB cycle temperature control on track equipment SPIE's 27th Annual International Symposium on Microlithography. ,vol. 4690, pp. 754- 760 ,(2002) , 10.1117/12.474276
David A. Steele, Anthony Coniglio, Cherry Tang, Bhanwar Singh, Steve Nip, Costas J. Spanos, Characterizing post-exposure bake processing for transient- and steady-state conditions in the context of critical dimension control Metrology, inspection, and process control for microlithography. Conference. ,vol. 4689, pp. 517- 530 ,(2002) , 10.1117/12.473491
S. Wei, S. Wu, I. Kao, F. P. Chiang, Measurement of Wafer Surface Using Shadow Moiré Technique With Talbot Effect Journal of Electronic Packaging. ,vol. 120, pp. 166- 170 ,(1998) , 10.1115/1.2792612
W.K. Ho, A. Tay, Y. Zhou, K. Yang, In situ fault detection of wafer warpage in microlithography IEEE Transactions on Semiconductor Manufacturing. ,vol. 17, pp. 402- 407 ,(2004) , 10.1109/TSM.2004.831536
A. Tay, Weng Khuen Ho, Young Peng Poh, Minimum time control of conductive heating systems for microelectronics processing IEEE Transactions on Semiconductor Manufacturing. ,vol. 14, pp. 381- 386 ,(2001) , 10.1109/66.964325
Weng Khuen Ho, A. Tay, C.D. Schaper, Optimal predictive control with constraints for the processing of semiconductor wafers on bake plates IEEE Transactions on Semiconductor Manufacturing. ,vol. 13, pp. 88- 96 ,(2000) , 10.1109/66.827348
Weng Khuen Ho, Lay Lay Lee, A. Tay, C. Schaper, Resist film uniformity in the microlithography process IEEE Transactions on Semiconductor Manufacturing. ,vol. 15, pp. 323- 330 ,(2002) , 10.1109/TSM.2002.801380