Ferroelectric Thin Films and Thin Film Devices

摘要: Research and development efforts on ferroelectric memories have been underway since about 1955. The early work, largely at IBM, RCA, Bell Telephone Laboratories other US industrial laboratories was stymied by two problems: Firstly, the materials were too thick to permit operation 5 V, standard “TTL” or “CMOS” operating voltages in silicon integrated circuit technology that dominates microelectronics industry; second, there is considerable “crosstalk” unintentional switching of cells laid out simple row-and-column matrix form. In 1990s, however, perspective very different: Techniques for depositing thin, pinholefree films developed significantly past three decades; present sputtering, sol-gel spinon, laser ablation, various techniques (MOD, MOCVD, etc.) can all be used prepare optically uniform over full 4′ 6′ wafers, capable withstanding 4 MV/cm more. And old problem cross-talk “half-select disturb pulses” has circumvented designing memory arrays which each cell isolated from its neighbors one transistors (“IT” “2T” DRAM architecture) as many six (in a more conservative “6T” SRAM lay-out). As result, renaissance engineering interest thin films.