Digital RF Processor Techniques for Single-Chip Radios

摘要: RF circuits for multi-GHz frequencies have recently migrated to low-cost digital deep-submicron CMOS processes. Unfortunately, this process environment, which is optimized only logic and SRAM memory, extremely unfriendly conventional analog designs. We present fundamental techniques developed that transform the circuit design complexity domain a wireless transceiver, so it enjoys benefits of approach, such as node scaling automation. All-digital phase locked loop, all-digital control amplitude polar transmitter, direct sampling allow great flexibility in reconfigurable radio design. Digital signal processing concepts are used help relieve complexity, allowing one reduce cost power consumption environment. VHDL hardware description language universally throughout SoC. The ideas presented been Texas Instruments develop two generations commercial processors: single-chip Bluetooth GSM radio.