作者: JaeWoong Chung , H. Chafi , C. Cao Minh , A. McDonald , B. Carlstrom
DOI: 10.1109/HPCA.2006.1598135
关键词: Multithreading 、 Transaction processing 、 Parallel programming model 、 Source code 、 Database transaction 、 Computer science 、 Software transactional memory 、 Transactional memory 、 Parallel computing 、 Software
摘要: Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed alternative hardware software TM implementations. However, lack of transaction-based programs makes it difficult to understand merits each proposal tune future implementations common case behavior real application. This work addresses this problem by analyzing transactional 35 multithreaded from a wide range application domains. We identify transactions within source code mapping existing primitives parallelism synchronization management transaction boundaries. The analysis covers basic characteristics such as length, distribution read-set write-set size, frequency nesting I/O operations. measured provide key insights into design efficient systems both non-blocking speculative parallelization.