Power loss compensation for programmable memory control system

摘要: An arrangement for storing user programmed system timing information in a microprogrammable the event of power outage. The includes static random access memory (RAM) periodically microprocessor-generated and an electrically erasable programmable ROM (EEPROM) which is coupled to RAM temporary storage this Also provided down sensor responsive AC-coupled supply detecting loss system. When input voltage drops below predetermined value, contents are automatically transferred nonvolatile EEPROM. restored, stored EEPROM retransferred back use by microprocessor permitting resumption operation as previously on time-shifted basis where time shift equals duration particularly adapted with user-programmed device, such television receiver or video cassette recorder, environment outages very short randomly occur. present invention permits resume following without employing combination battery, oscillator, CMOS appropriate recharging circuitry, generally utilized systems.