Accelerated multimedia processor

作者： Paul Look , Pius Ng , Paul Chiang

DOI:

关键词: Logical conjunction 、 Bit (horse) 、 Carry (arithmetic) 、 Set (abstract data type) 、 Routing (electronic design automation) 、 16-bit 、 Byte 、 Computer science 、 Computer hardware 、 Permutation (music)

摘要: A programmable multimedia accelerator which maximizes data bandwidth utilization with minimal hardware (and consequently power consumption) is provided herein. In one embodiment, the includes four functional units, a routing unit, and control module. The units each operate on input bytes carry-in bit, produce two output carry-out bit. bit of unit as to another allowing cooperatively carry out extended-precision operations when needed. can also individually perform low-precision in parallel. coupled receive provide permutation additional pairs units. module stores executes set instructions signals are preferably configured 8×8 multiplications 16 such addition, subtraction, logical AND, XOR.