作者: Hidehiro Asai , Kenichi Echigoya
DOI:
关键词: Cache coloring 、 Memory map 、 Cache-only memory architecture 、 Computer science 、 Flat memory model 、 Memory refresh 、 Computer hardware 、 Cache pollution 、 Interleaved memory 、 Semiconductor memory
摘要: A cache memory system having an improved area addressing scheme for rewriting is disclosed. The comprises a plurality of areas, first detection circuit designating the least recently accessed by CPU, second detecting that not designated and control forcibly selecting predetermined one when designated.