Implementation and performance study of a hardware-VIA-based network adapter on gigabit ethernet

摘要: This paper presents the implementation and performance of a hardware-VIA-based network adapter on Gigabit Ethernet. VIA is useer-level communication interface for high PC clustering. The 64-bit/66 MHz PCI plug-in card containing an FPGA Protocol Engine Ethernet chip to construct system area network. performs virtual-to-physical address translation, doorbell, RDMA write, send/receive completion operations in hardware without kernel intervention. In particular, Address Translation Table (ATT) stored local memory adapter, efficiently controls translation process by directly accessing ATT. addition, Prefetch Buffer used reduce time receiver. As result, overhead during transactions greatly reduced. Our experimental results show minimum latency 8.2 µs, maximum bandwidth 112.1 MB/s. terms latency, 2.8 times 3.3 faster than M-VIA, which software VIA, TCP/IP, respectively, over 24% 55% higher M-VIA respectively. These that HVIA-GE far better ServerNet II, version developed Tandem/Compaq.