An On-Chip and Inter-Chip Communications Network for the SpiNNaker Massively-Parallel Neural Net Simulator

作者: Luis A. Plana , John Bainbridge , Steve Furber , Sean Salisbury , Yebin Shi

DOI: 10.1109/NOCS.2008.4492744

关键词: Massively parallelNetwork on a chipPacket switchingComputer scienceComputer architectureScalabilityTelecommunications networkDistributed computingContent-addressable memoryMulticastChip

摘要: SpiNNaker is a scalable, multichip system designed for the purpose of real-time modelling spiking neurons with an efficient multicast communications infrastructure inspired by neurobiology. uses GALS packet-switched network to emulate very high connectivity biological systems. This paper presents on-chip and inter-chip SpiNNaker.

参考文章(2)
Luis A. Plana, Steve B. Furber, Steve Temple, Mukaram Khan, Yebin Shi, Jian Wu, Shufan Yang, A GALS Infrastructure for a Massively Parallel Multiprocessor IEEE Design & Test of Computers. ,vol. 24, pp. 454- 463 ,(2007) , 10.1109/MDT.2007.149
J. Bainbridge, S. Furber, Chain: a delay-insensitive chip area interconnect IEEE Micro. ,vol. 22, pp. 16- 23 ,(2002) , 10.1109/MM.2002.1044296