作者: D.L. Miller , J.X. Przybysz , A.H. Worsham , Joonhee Kang
DOI: 10.1109/77.621793
关键词: Transfer (computing) 、 Demultiplexer 、 Shift register 、 Physics 、 Electronic circuit 、 Low voltage 、 Optoelectronics 、 Data transmission 、 Logic gate 、 Voltage
摘要: Many applications of Single-Flux-Quantum (SFQ) circuits will rely on the transfer multi-Gigabit per second data streams from SFQ logic to semiconductor for further processing. The low output voltages superconducting currently limit rate channel a few GHz. We have designed and fabricated an demultiplexer reduce clock rates. uses clocked distribution through binary tree architecture. circuit was using eight level Nb/AlO/sub x//Nb process tested at 4.2 K.