An efficient FPGA implementation of principle component analysis based network intrusion detection system

摘要: Modern Network Intrsuion Detection Systems (NIDSs) use anomaly detection to capture malicious attacks. Since such connections are described by large set of dimensions, processing these huge amounts network data becomes extremely slow. To solve this time-efficiency problem, statistical methods like Principal Component Analysis (PCA) can be used reduce the dimensionality data. In paper, we design and implement an efficient FPGA architecture for in NIDSs. Moreover, using representative intrusion traces, show that our correctly classifies attacks with rates exceeding 99.9% false alarm as low 1.95%. Our implementation on a Xilinx Virtex-II Pro platform provides core throughput up 24.72 Gbps, clocking at frequency 96.56 MHz.