Device for synchronising a pseudo-binary signal with a phase-hopped regenerated clock signal

摘要: Abstract of EP0396461The device synchronises a pseudo-binary signal (HDB +), which is particularly affected by high jitter, with clock (HRG) regenerated as synchronised (HB +). The can be included between an output bipolar-binary converter receiving plesiochronous bipolar and input HDB/binary transcoder in circuit for synchronising time-division multiplexer. has period Tj substantially less than the nominal offers phase hops, lying particular Tj/2 Tj, so that average equal to period. preferably comprises, at input, flip-flop (91) used frequency divider-by-2 order produce first logic (H +) alternately "0" "1" levels response transitions signal, then (92) setting active into in-phase + (i)), two flip-flops (93, 94) exclusive-OR gate (95) providing gating pulses level having width set up respectively (i)).