An ultra wideband TAG circuit transceiver architecture
作者： L. Stoica , S. Tiuraniemi , A. Rabbachin , I. Oppermann
DOI: 10.1109/UWBST.2004.1320975
关键词: Variable-gain amplifier 、 Amplifier 、 Electrical engineering 、 Electronic circuit 、 Baseband 、 Pulse generator 、 Engineering 、 Electronic engineering 、 Delay-locked loop 、 Signal generator 、 Low-noise amplifier
摘要: The paper presents the architecture of a low power, complexity ultra wideband (UWB) transceiver circuit. circuit is designed for data rate, cost applications with built in location and tracking. system based on non-coherent which enables receiver to be extremely simple largely insensitive transmitted pulse shape. presented contains oscillator generator, transmitter, baseband digital signal processing (DSP) block. generator quartz oscillator, delay-locked loop (DLL) edge combiner clock multiplication generate 495 MHz timing generation. transmitter second DLL (to fix UWB delay), antenna. RF together are presented. noise amplifier, variable gain squaring circuits, integrators energy collection, 4 bit A/D converters, control logic, integrator selection logic block detection/bit decision circuits 0.35 /spl mu/m Si-Ge BiCMOS process from Austria Microsystems. TAG not yet manufactured.
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