Multiplier for DSP Application in CPS System

作者: Abhishek Kumar

DOI: 10.4018/978-1-7998-5101-1.CH011

关键词: Computer hardwareDigital signal processingComputer scienceMultiplier (economics)

摘要:

参考文章(20)
Garrison Greenwood, John Gallagher, Eric Matson, Cyber-Physical Systems: The Next Generation of Evolvable Hardware Research and Applications Springer, Cham. ,vol. 1, pp. 285- 296 ,(2015) , 10.1007/978-3-319-13359-1_23
S. Kawahito, M. Kameyama, T. Higuchi, H. Yamada, A 32*32-bit multiplier using multiple-valued MOS current-mode circuits IEEE Journal of Solid-state Circuits. ,vol. 23, pp. 124- 132 ,(1988) , 10.1109/4.268
Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija, Energy efficient implementation of parallel CMOS multipliers with improved compressors international symposium on low power electronics and design. pp. 147- 152 ,(2010) , 10.1145/1840845.1840876
Peter Varman, Kartik Mohanram, Kai Du, High performance reliable variable latency carry select addition design, automation, and test in europe. pp. 1257- 1262 ,(2012) , 10.5555/2492708.2493017
S. Das, D. Roberts, S. Lee, S. Pant, D. Blaauw, T. Austin, K. Flautner, T. Mudge, A Self-Tuning DVS Processor Using Delay-Error Detection and Correction IEEE Journal of Solid-State Circuits. ,vol. 41, pp. 792- 804 ,(2006) , 10.1109/JSSC.2006.870912
Shyh-Jye Jon, Hui-Hsuan Wang, Fixed-width multiplier for DSP application international conference on computer design. pp. 318- 322 ,(2000) , 10.1109/ICCD.2000.878302
Andrea Calimera, Enrico Macii, Massimo Poncino, Design Techniques for NBTI-Tolerant Power-Gating Architectures IEEE Transactions on Circuits and Systems Ii-express Briefs. ,vol. 59, pp. 249- 253 ,(2012) , 10.1109/TCSII.2012.2188457
R. Menon, D. Radhakrishnan, High performance 5 : 2 compressor architectures IEE Proceedings - Circuits, Devices and Systems. ,vol. 153, pp. 447- 452 ,(2006) , 10.1049/IP-CDS:20050152
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska, Performance Optimization Using Variable-Latency Design Style IEEE Transactions on Very Large Scale Integration Systems. ,vol. 19, pp. 1874- 1883 ,(2011) , 10.1109/TVLSI.2010.2058874
Michel Kinsy, Omer Khan, Ivan Celanovic, Dusan Majstorovic, Nikola Celanovic, Srinivas Devadas, None, Time-Predictable Computer Architecture for Cyber-Physical Systems: Digital Emulation of Power Electronics Systems real-time systems symposium. pp. 305- 316 ,(2011) , 10.1109/RTSS.2011.35