作者: Prashant Jain , Jason M Kassoff , Sandeep Gupta
DOI:
关键词: Cache 、 Integrated circuit 、 Set (abstract data type) 、 Value (computer science) 、 Computer hardware 、 Computer science
摘要: Techniques are disclosed relating to set-associative caches in processors. In one embodiment, an integrated circuit is that includes a cache configured receive request for data block stored of plurality ways within the cache, specifying address, portion which tag value. such way prediction predict, based on value, requested stored. The further array perform comparison value with set previously portions corresponding ways. determine whether hits predicted and output comparison.