Logic circuit for true and complement digital data transfer

摘要: A logic circuit for the transfer of true and complement binary digital bits information employs "single rail" techniques to eliminate several elements required in prior art "double circuits. J-K flip-flop is arranged receive each bit data at both its J K inputs upon being clocked produces "true" output relative input when has been previously put into "clear" condition, outputs "set" condition. Simplification by elimination a number results cost savings over comparable circuits improved speed operation as well.