作者: Sudarshan Bala Cadambi , Richard P. Mangold , Gerald S. Holzhammer , Thomas J. Hernandez
DOI:
关键词: CPU modes 、 Interrupt 、 CPU core voltage 、 CPU time 、 Underclocking 、 Embedded system 、 CPU shielding 、 Engineering 、 CPU power dissipation 、 Power management
摘要: A system for managing power consumption in a personal computer, specifically the CPU and on-board devices. The present invention manages of devices (i.e., core logic) using global event messaging scheme an OS-Idle interrupts to provide management. CPU's low-power state is implemented such that any or set predetermined device will transition from normal operation which commences at first instruction interrupt handler invoked by interrupt. consumed platform/chipset controller logic devices, i.e., logic, influenced clocks can be managed decreasing frequency stopping distributed clock(s) altogether when state. Where chipsets manage clock distribution, additional hardware mechanisms curtailing may incorporated activated software but are de-activated automatically hardware. management coordinator reduce voltage spikes sags.