作者: Yanfeng Du , Brian David Yanoff , Naresh Kesavan Rao , Jianjun Guo
DOI:
关键词: Integrating ADC 、 Time delay and integration 、 Integrator 、 Control theory 、 Voltage 、 Signal generator 、 Control theory 、 Current source 、 Signal 、 Engineering
摘要: An event time stamping system comprising a current source, an integrator input and output, configured to output voltage proportional the length of source is coupled input, one or more switches couple upon receipt signal de-couple from control trigger. The further comprises lock-out generator generate signal, controller switches, wherein trigger based on ensure minimum integration time.