作者: Kawabata Koji , Tsuda Keiji
DOI:
关键词: Clock signal 、 Optical recording 、 Electrical engineering 、 Modulation 、 Computer science 、 Optical disc 、 Synchronization 、 Signal 、 Phase-locked loop 、 Demodulation
摘要: PROBLEM TO BE SOLVED: To improve access time without increasing manufacturing costs and sacrificing a high-precision recording pulse. SOLUTION: A clock generation circuit 7 is provided with PLL an oscillator generating pulse (SCLK) for signal (WCLK) that synchronization performing prescribed modulation processing to data be recorded on optical disk 1 in wobble (WBL). divider 8 divides the generate signal. detection 12 address decoder 9 detect demodulate During seek outer circumference of 1, division ratio varied so frequency lowered than during inner circumference. COPYRIGHT: (C)2007,JPO&INPIT