Design and performance testing of a 2.29-GB/s Rijndael processor
作者： I. Verbauwhede , P. Schaumont , H. Kuo
关键词: Cryptography 、 Encryption 、 Computer science 、 Embedded system 、 Advanced Encryption Standard 、 AES implementations 、 Very-large-scale integration
摘要: This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s throughput at 56 mW power consumption in a 0.18-/spl mu/m CMOS standard cell technology. integrated circuit implements Rijndael algorithm, any combination block lengths (128, 192, or 25 bits) key 256 bits). We present architecture discuss optimizations. also measurement results were obtained from set 14 test samples this chip.
kuleuven.be 
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