Low-k interconnect stack with multi-layer air gap and tri-metal-insulator-metal capacitors for 14nm high volume manufacturing
作者： K. Fischer , M. Agostinelli , C. Allen , D. Bahr , M. Bost
DOI: 10.1109/IITC-MAM.2015.7325600
关键词: Capacitor 、 Multi layer 、 Stack (abstract data type) 、 Division (mathematics) 、 Materials science 、 Air gap (plumbing) 、 Optoelectronics 、 Electrical engineering 、 Volume (computing) 、 Yield (engineering) 、 Interconnection
摘要: We describe here Intel's 14nm high-performance logic technology interconnects and back end stack featuring 13 metal layers a tri-metal laminated metal-insulator-metal (MIM) capacitor. For the first time on product in high volume, multiple (M4 M6) incorporate an air gap integration scheme to deliver up 17% RC benefit. Pitch Division patterning is introduced yield capable interconnect with minimum pitch of 52nm.
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