作者: Uri Cummings , Andrew Lines
DOI:
关键词: Clock signal 、 Asynchronous communication 、 Electronic engineering 、 Digital clock manager 、 Asynchronous system 、 Clock domain crossing 、 Asynchronous circuit 、 Computer science 、 Synchronous circuit 、 Synchronizer
摘要: Methods and apparatus are described relating to a system-on-a-chip which includes plurality of synchronous modules, each module having an associated clock domain characterized by data rate, the rates comprising different rates. The also converters. Each converter is coupled corresponding one operable convert between asynchronous transmission according handshake protocol. An crossbar converters, in implement first-in-first-out (FIFO) channel any two thereby facilitating communication modules.