Enhanced prioritising and unifying interrupt controller
作者： Andrew Michael Evans , Alastair Erik Thomas Cook
DOI:
关键词: Programmable Interrupt Controller 、 Interrupt vector table 、 Operating system 、 Interrupt 、 Computer hardware 、 Interrupt latency 、 Vectored Interrupt 、 Interrupt handler 、 Interrupt priority level 、 Computer science 、 Interrupt request
摘要: An enhanced interrupt controller is provided which able to receive both hardware-generated and software-generated request signals. Data associated with each received or signal stored in a storage unit within the an order depends on priority level of data and, for same priority, chronological receipt. The instructs processor, it communication, read from ensuring that higher before lower priority. A method routing signals processor also disclosed.
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