Graphics render clock throttling and gating mechanism for power saving
作者： Lai Kuan Chong , Lai Guan Tang
DOI:
关键词: Digital clock manager 、 Clock domain crossing 、 State (computer science) 、 Clock gating 、 Synchronous circuit 、 Underclocking 、 Computer science 、 Computer hardware 、 Clock skew 、 Graphics
摘要: An example of a controller circuit may include policy module to generate power reduction output based on processor state input. The also be generated graphics render engine idleness can clock masking cell apply configuration trunk the output.
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