RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA RECOVERY (CDR) CIRCUITS, AND RELATED SYSTEMS AND METHODS
作者： Nam V. Dang , Jingcheng Zhuang
DOI:
关键词: CPU multiplier 、 Clock domain crossing 、 Clock skew 、 Computer hardware 、 Data stream 、 Clock signal 、 Clock gating 、 Computer science 、 Digital clock manager 、 Synchronous circuit 、 Electronic engineering
摘要: Clock and data recovery (CDR) circuits resettable voltage controlled oscillators (VCOs) are disclosed. In one embodiment, the CDR circuit includes a sampler configured to receive stream in path sample stream. However, clock signal of needs be recovered since may not accompanied by signal. To recover from stream, have VCO generate output. The operably associated so that samples based on can reset adjust phase output help reduce sampling errors resulting drift and/or
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