Integrated graphics subsystem with message-passing architecture
作者： David Robert Baldwin
DOI:
关键词: Chip 、 Graphics 、 Asynchronous communication 、 Graphics pipeline 、 3D rendering 、 Computer hardware 、 Computer science 、 Look-ahead 、 Pipeline (computing) 、 Throughput (business)
摘要: A graphics processing chip which uses a deep pipeline of multiple asynchronous units to achieve high net throughput in 3D rendering. Preferably reads and writes local buffer are provided by separate stages the pipeline. some individual include parallel paths internally. connected look ahead more than one stage, keep filled while minimizing use expensive FIFOs.
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