作者: Dongsun Kim , Hyunsik Kim , Hongsik Kim , Gunhee Han , Duckjin Chung
DOI: 10.1007/11427445_108
关键词: Computer science 、 Field-programmable gate array 、 SIMD 、 Massively parallel computation 、 Image processing 、 Distributed memory 、 Massively parallel 、 Artificial neural network 、 Parallel processing (DSP implementation) 、 Chip 、 Parallel computing
摘要: Artificial Neural Networks (ANNs) and image processing requires massively parallel computation of simple operator accompanied by heavy memory access. Thus, this type operators naturally maps onto Single Instruction Multiple Data (SIMD) stream with distributed memory. This paper proposes a high performance neural network processor whose function can be changed programming. The proposed is based on the SIMD architecture that optimized for processing. supports 24 instructions, consists 16 Processing Units (PUs) per chip. Each PU includes 24-bit 2K-word Local Memory (LM) Element (PE). allows multichip expansion minimizes chip-to-chip communication bottleneck. verified FPGA implementation functionality character recognition application.