FPGA architecture including direct logic function circuit to I/O interconnections
作者： King W. Chan
DOI:
关键词: Electrical impedance 、 Interconnection 、 Node (circuits) 、 Integrated circuit 、 Engineering 、 State (computer science) 、 Function (mathematics) 、 Electronic circuit 、 Electrical conductor 、 Electrical engineering
摘要: A user-programmable FPGA architecture includes a plurality of logic function circuits having inputs and outputs disposed on an integrated circuit. input/output (I/O) modules are also the circuit communicate with I/O pads The each include: (1) input buffer connected to pad output node, (2) pad, control node for placing into high impedance state. general interconnect structure conductors which may be one another, circuits, by programming elements. Direct interconnections made between selected ones nodes modules.
lens.org 参考文章(19)
William S. Carter, Configurable logic element ,(1985)
Amr M. Mohsen, Universal interconnect matrix array ,(1992)
Bradford S. Kitson, Paul W. Harvey, Warren K. Miller, Apparatus for producing any one of a plurality of signals at a single output ,(1982)
Om Agrawal, Multiple array customizable logic device ,(1988)
Ali Pourkeramati, Robin J. Jigour, Shueh-Mien J. Lee, High-performance user programmable logic device (PLD) ,(1990)
Robert J. Russell, Method of organizing programmable logic array devices for board testability ,(1990)
William S. Carter, Bidirectional buffer amplifier ,(1984)
Abbas A. El Gamal, John L. McCollum, Jonathan W. Greene, Programmable interconnect architecture ,(1991)
Mark E. Fitzpatrick, Zahid Ansari, Cyrus Tsui, Albert Chan, Andrew K. L. Chan, Output circuit for a programmable logic array ,(1985)
John M. Birkner, Hua-Thye Chua, Andrew K. Chan, Programmable application specific integrated circuit and logic cell therefor ,(1994)