Flexible interface circuit and method for delta sigma A/D converters
作者： Michael Reinhold , Miroslav Oljaca
DOI:
关键词: Signal 、 Electronic engineering 、 Digital signal 、 Clock skew 、 Clock signal 、 Clock domain crossing 、 Synchronous circuit 、 Self-clocking signal 、 Asynchronous circuit 、 Engineering
摘要: A multi-mode interface circuit for coupling a delta sigma modulator ( 24 ) to processor includes decoder 20 decoding mode selection inputs produce plurality of control signals controlling an oscillator and multiplexers. The is enabled first clock signal (INTCLK). or external (EXTCLK) multiplexed as second 40 the input code generator 23 ), causing it generate (MCLK) applied modulator, third fourth 41, 42 phase-shift-modulated 43 in response both 1-bit data (MDAT) produced by modulator. One ground conductor 13 ). onto output 14
lens.org 参考文章(8)
Carlin Dru Cabler, Alfredo R. Linz, Delta-sigma ADC with multi-stage decimation filter and gain compensation filter ,(1994)
Leopold Ernest Pellon, Nonlinear filter correction of multibit ΣΔ modulators ,(1999)
James M. Sobol, Ronald A. Cellini, James Wilson, Analog to digital conversion using nonuniform sample rates ,(1994)
Leopold Ernest Pellon, Nonlinear filter correction of multibit sigma delta modulators ,(1999)
Douglas F. Pastorello, Reduced power FIR filter ,(1996)
Frank Den Breejen, Eric T. King, Bruce P. Del Signore, Douglas F. Pastorello, William F. Gardei, Victor Aguilar, Single phase bi-directional electrical measurement systems and methods using ADCs ,(2000)
Marcus W. May, C. Eric Seaberg, Method and system for asynchronous sample rate conversion using a noise-shaped numerically control oscillator ,(1998)
William J. Mandl, Method and apparatus for multiplexed oversampled analog to digital modulation ,(1993)