Memory disturb reduction for nonvolatile memory

作者: Tei-Wei Kuo , Yung-Chun Li , Yuan-Hao Chang , Hsiang-Pang Li , Cheng-Yuan Wang

DOI:

关键词: Group (periodic table)Computer scienceNon-volatile memoryComputer hardwareNAND gateReduction (complexity)Parallel computingBlock (data storage)

摘要: Technology is described that supports reduced program disturb of nonvolatile memory. A three/two dimensional NAND array includes a plurality pages, which are divided into page groups. Access allowed to memory cells within first group groups in an erase block the three array, while access minimized second array. Pages same physically nonadjacent with each other

参考文章(39)
Sang-Won Lee, Won-Kyoung Choi, Dong-Joo Park, FAST: an efficient flash translation layer for flash memory embedded and ubiquitous computing. pp. 879- 887 ,(2006) , 10.1007/11807964_88
Amir Ban, Flash file system ,(1994)
Wen-Jer Tsai, Jyun-Siang Huang, Hot carrier programming in nand flash ,(2010)
Dong-Yean Oh, Seung-Chul Lee, Woon-kyung Lee, NAND flash memory device and method of making same ,(2012)
Ping-Hung Tsai, Jyun-Siang Huang, Wen-Jer Tsai, Low voltage programming in nand flash ,(2010)
YunSeung Shin, Non-volatile memory technologies for beyond 2010 symposium on vlsi circuits. pp. 156- 159 ,(2005) , 10.1109/VLSIC.2005.1469355