Method for managing database models for reduced programmable logic device components

摘要: Method and circuits to create reduced field programmable gate arrays (RFPGA) from the configuration data of (FPGA) are disclosed. The configurable elements FPGA replaced with standard cell that reproduce functionality configured FPGA. Specifically, logic blocks derived blocks. Similarly, input/output matrices for switch FPGA, respectively. logic.blocks arranged in a similar layout original CLBs so timing relationships remain RFPGA actual can be modified by increasing or decreasing delay on various signal paths based design additional constraints. To reduce time required generate RFPGAs, database used contain block models corresponding models. expanded as new created were not database. an