50-to-67GHz ESD-protected power amplifiers in digital 45nm LP CMOS
作者： K. Raczkowski , S. Thijs , W. De Raedt , B. Nauwelaers , P. Wambacq
DOI: 10.1109/ISSCC.2009.4977468
关键词:
摘要: Research in recent years has shown that downscaled CMOS is a serious technology candidate to implement transceivers for high-data-rate wireless communication around 60GHz [1,2]. A low-cost implementation the combination of digital part with transceiver onto single chip. The complexity demands very advanced technology, such as 45nm low-power (LP) CMOS. Although this features high maximum ƒ T , above 200GHz, back-end-of-line (BEOL) metallization layers are thinner than less-advanced technology. This implies lower quality factor passive components and intrinsic ESD robustness due higher sheet resistance metal layers. These restrictions, together limited power capabilities make design mm-wave amplifiers (PAs) more challenging [3,4].
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