作者: James B. Clairmont , Maureen F. McFadden , Florence Marie St. Pierre Sears , Howard T. Barrett , Karen S. Edwards
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摘要: A method and system is provided to use the same design manipulation processes for both chip kerf design. Concurrent generation of designs provides a consistent, accurate, repeatable process. Improved quality wafer testing results because data in matches chip. The total cycle time mask manufacturing reduced build accomplished prior start Also load balancing across multiple servers during optimize computing resources.