EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures

作者: Dirk Stroobandt , Ana Lucia Varbanescu , Catalin Bogdan Ciobanu , Muhammed Al Kadi , Andreas Brokalakis

DOI: 10.1109/RECOSOC.2016.7533896

关键词:

摘要: To handle the stringent performance requirements of future exascale-class applications, High Performance Computing (HPC) systems need ultra-efficient heterogeneous compute nodes. reduce power and increase performance, such nodes will require hardware accelerators with a high degree specialization. Ideally, dynamic reconfiguration be an intrinsic feature, so that specific HPC application features can optimally accelerated, even if they regularly change over time. In EXTRA project, we create new flexible exploration platform for developing reconfigurable architectures, design tools applications run-time built-in as core fundamental feature instead add-on. covers entire stack from architecture up to application, focusing on building blocks exascale systems: chip architectures very low overhead, truly take central concept, are tuned maximally benefit proposed techniques. Ultimately, this open improve Europe's competitive advantage leadership in field.

参考文章(12)
Feng Zhao, Andreas Tersiz, Amaya Souarez, Jie Liu, Mike Chieh-Jan Liang, Jeff O'Reilly, Michael Manos, Project Genome: Wireless Sensor Network for Data Center Cooling The Architecture Journal. ,(2008)
Y. Lutsyshyn, Fast quantum Monte Carlo on a GPU Computer Physics Communications. ,vol. 187, pp. 162- 174 ,(2015) , 10.1016/J.CPC.2014.09.016
D. Pnevmatikatos, K. Papadimitriou, T. Becker, P. Böhm, A. Brokalakis, K. Bruneel, C. Ciobanu, T. Davidson, G. Gaydadjiev, K. Heyse, W. Luk, X. Niu, I. Papaefstathiou, D. Pau, O. Pell, C. Pilato, M.D. Santambrogio, D. Sciuto, D. Stroobandt, T. Todman, E. Vansteenkiste, FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration Microprocessors and Microsystems. ,vol. 39, pp. 321- 338 ,(2015) , 10.1016/J.MICPRO.2014.09.006
Luciano Musa, FPGAS in high energy physics experiments at CERN field-programmable logic and applications. pp. 2- 2 ,(2008) , 10.1109/FPL.2008.4629896
Jason Luu, Jeffrey Goeders, Michael Wainberg, Andrew Somerville, Thien Yu, Konstantin Nasartschuk, Miad Nasr, Sen Wang, Tim Liu, Nooruddin Ahmed, Kenneth B. Kent, Jason Anderson, Jonathan Rose, Vaughn Betz, VTR 7.0 ACM Transactions on Reconfigurable Technology and Systems. ,vol. 7, pp. 1- 30 ,(2014) , 10.1145/2617593
Tony M. Brewer, Instruction Set Innovations for the Convey HC-1 Computer IEEE Micro. ,vol. 30, pp. 70- 79 ,(2010) , 10.1109/MM.2010.36
Xinyu Niu, Wayne Luk, Yu Wang, EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access field programmable gate arrays. pp. 74- 83 ,(2015) , 10.1145/2684746.2689076
Eddie Hung, Tim Todman, Wayne Luk, Transparent insertion of latency-oblivious logic onto FPGAs field programmable logic and applications. pp. 1- 8 ,(2014) , 10.1109/FPL.2014.6927497
Amos G. Anderson, William A. Goddard, Peter Schröder, Quantum Monte Carlo on graphical processing units Computer Physics Communications. ,vol. 177, pp. 298- 306 ,(2007) , 10.1016/J.CPC.2007.03.004
Kenneth Esler, Jeongnim Kim, David Ceperley, Luke Shulenburger, Accelerating Quantum Monte Carlo Simulations of Real Materials on GPU Clusters computational science and engineering. ,vol. 14, pp. 40- 51 ,(2012) , 10.1109/MCSE.2010.122