Partially resettable, segmented DMA counter
作者： Edgar R. Macachor
DOI:
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摘要: A direct memory access (DMA) controller (4) utilizes a segmented counter (220). first, byte portion (330) of the is initialized with preselected value and decremented for each transfer. After reaches it decrements second, block (332) which based upon amount data to be transferred. When both reach zero transfer completed.
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