作者: Naoshi Yamada , Kentaro Irie , Toshihide Tsubata , Fumikazu Shimoshikiryo , Masae Kitayama
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摘要: A gate driver creates a dummy insertion period in which the does not apply on pulse to scanning signal line immediately after time of inversion data signal. When from application an odd numbered or even is applied previously later set as adjacent writing lag for two lines each other, CS control circuit allows polarity every be reversed same cycle at least period. This makes it possible provide liquid crystal display device capable offering high quality unevenness suppressed without being affected by blunt waveform and retention volume inversion.