CCD imager analog processor systems and methods

摘要: A processing system for a charge coupled device (CCD) or CMOS imaging includes multi-mode, multiple current level, correlated double sample and variable gain (CDS/VGA) circuit receiving data from CCD system, subject to horizontal vertical timing signals the which are locally generated by itself. The particularly programmable circuitry controlling detection of pixel intensity values elements two-dimensional array, with low-frequency master driving high-frequency circuit, wherein independently provided array analog processor actually sampling array. architecture further sampler, black level clamp, an A/D conversion module. camera producing imager signal, (CDS) imager, amplifier (VGA) having amplifiers selectable enable reduced resolution, analog-to-digital converter (ADC) bit-width output said VGA ADC. single chip front end produces digitized in bit formats corresponding selected resolution. resolution levels respectively still image capture separate video display on another viewing screen.