作者: Mirmajid Seyyedy , Hasan Nejad
DOI:
关键词:
摘要: A memory array architecture incorporates certain advantages from both cross-point and 1T-1Cell architectures during reading operations. The fast read-time higher signal to noise ratio of the packing density are exploited by using a single access transistor control multiple stacked columns cells, each column being provided in respective layer.