Testing system and method for memory modules having a memory hub architecture
作者： Robert Totorica , Joseph M. Jeddeloh
DOI:
关键词:
摘要: A testing method and system is used to test memory modules each of which has a hub coupled plurality devices. The includes interface circuit having that transmit receive signals from tester through bus. couples the in module communications link responsive command, address data received tester. also receives are indicative response signals. then provides corresponding results
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