Memory device and method having multiple internal data buses and memory bank interleaving
作者： Joseph M. Jeddeloh
DOI:
关键词:
摘要: A memory device and method receives write data through a unidirectional downstream bus outputs read upstream bus. The is coupled to pair of internal buses, the buses. first set multiplexers selectively couple each buses any plurality banks cells. Similarly, second cells Write can be one concurrently with coupling from another banks. Also, may respective two different banks,
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