UPSC SVPWM controlled multi-level inverter topology for multiple pole-pair induction motor drive for minimising torque ripple

摘要: The demand for multi-level inverters is increasing progressively in motor control applications. Many pulse width modulation (PWM) techniques are proposed the literature and one of popular methods unipolar phase shifted carrier (UPSC) PWM. This PWM technique commonly used uninterrupted power supply applications where transformer multiple primary windings connected to two-level inverters. However, this not popularly drives because a conventional induction consists only two terminals per phase. In study, inverter configuration four pole drive presented, it compatible use above mentioned technique. By using UPSC technique, all lower order harmonics times switching frequency, which turn reduces torque ripple considerably. concept tested on 5hp four-pole MATLAB/Simulink finite element analysis also experimentally verified with laboratory prototype. simulation experimental results show effectiveness topology demonstrate improvement harmonic profile ripple.